Silicon oxide based gate dielectric layer
US6844076B2 · kind B2 · utility
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8References
6Claims
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Key dates
| Filing date | Oct 30, 2003 |
| Grant date | Jan 18, 2005 |
| Priority date | — |
| Expiry date | Oct 30, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/265
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a dielectric layer formed between a first and a second conductive layer. The dielectric layer comprising a layer of silicon oxide SiOX≦2, having a dielectric constant greater than about 3.9 and less than or equal to about 12.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.