CMP process
US6844262B1 · kind B1 · utility
2Cited by
5References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2001 |
| Grant date | Jan 18, 2005 |
| Priority date | — |
| Expiry date | Oct 16, 2021 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B37/042
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A method of making a semiconductor structure includes determining a polish time which is sufficient to planarize a layer on a semiconductor substrate. The layer is polished for the polish time to planarize the layer, and then the layer is polished to a predetermined thickness. The semiconductor structures can be used to make a semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.