DLL with false lock protector
US6844761B2 · kind B2 · utility
25Cited by
2References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 12, 2003 |
| Grant date | Jan 18, 2005 |
| Priority date | — |
| Expiry date | May 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/14
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method are disclosed for providing a DLL with false lock protector to avoid false lock and ensure accurate lock. The false lock protector operates when the initial delay time between signals from an input reference clock and an output clock exceeds the lock range during operation of the DLL. The DLL with false lock protector includes a reference clock, a delay line composed of several delay cells connected in series, a phase detector, comparator for comparing phases of signals from the reference and output clocks, a determinator and a controller for controlling the delay of the delay line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.