Circuitry to provide a low power input buffer
US6844770B2 · kind B2 · utility
2Cited by
13References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 16, 2003 |
| Grant date | Jan 18, 2005 |
| Priority date | — |
| Expiry date | Apr 16, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01721
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Input buffer circuitry that prevents high voltage output from high voltage circuitry from being applied to connected low voltage circuitry. An input of the input buffer circuitry receives signals from the high voltage circuitry. Pinch-off circuitry receives the input signals and prevents voltage above a threshold voltage from being applied to an output of the pinch-off circuitry. Boost circuitry controls the threshold voltage of the pinch-off circuitry and pull-up circuitry draws voltage from the output of the pinch-off circuitry to regulate the control by the booster circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.