Method of driving a shift register, a shift register, a liquid crystal display device having the shift register
US6845140B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2003 |
| Grant date | Jan 18, 2005 |
| Priority date | — |
| Expiry date | Jul 7, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a shift register and LCD device having the shift register that may be employed in the liquid crystal display device having a large screen size and a large resolution, the shift register includes stages cascade-connected with each other and each of the stages have a carry buffer for generating a carry signal. The pull-down transistor of each of the stages of the shift register is divided into a first pull-down transistor and a second pull-down transistor. A power voltage Vona larger than the power voltage Von applied to a clock generator is applied to the shift register. A signal delay due to the RC delay of the gate lines may be minimized, the shift register is independent of the variation of the threshold voltage of the TFTs, and image display quality may not be deteriorated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.