Bus driver
US6847235B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 18, 2002 |
| Grant date | Jan 25, 2005 |
| Priority date | — |
| Expiry date | Dec 18, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/164
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output driver includes a predriver circuit coupled to a complimentary MOS transistor pair. Third and fourth complimentary MOS transistors are coupled between a source-drain pair of the first and second MOS transistors, respectively and an output. The back gate of at least one of the third and fourth transistors is coupled to the output to provide a lower VT at the beginning of a transition without creating excessive undershoot or overshoot. A diode is coupled in parallel with the source-drain paths of the third and fourth transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.