Semiconductor memory device
US6847561B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2003 |
| Grant date | Jan 25, 2005 |
| Priority date | — |
| Expiry date | Aug 28, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes (a) a plurality of reference cells, (b) a plurality of memory cells, data stored in a selected reference cell among the reference cells being compared to data stored in a selected memory cell among the memory cells, (c) an address transition detector for detecting transition in input of addresses by which a memory cell is selected among the memory cells, and transmitting an address transition detecting signal indicative of the detected transition, (d) a counter for counting the address transition detecting signals, and (e) a reference cell decoder for selecting a reference cell among the reference cells in accordance with an output transmitted from the counter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.