Error reduction in semiconductor processes
US6848066B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2003 |
| Grant date | Jan 25, 2005 |
| Priority date | — |
| Expiry date | Aug 4, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F9/7003
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A photolithography system includes a photolithography tool 32 that includes a stage upon which a semiconductor wafer is mounted. The tool is operable to move the stage to automatically focus a pre-determined image on a surface of the semiconductor wafer. The tool is further operable to log movements of the stage. The system also includes an automation host computer 36 operable to poll the photolithography tool 32 to obtain data reflecting the logged movements of the stage. The automation host computer 36 is further operable to analyze the data and compare the data to pre-determined error conditions. The host computer also takes a pre-determined action, including sending an electronic mail message to the personal computers 38 of relevant line personnel, in the event the data meets the pre-determined error conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.