Thin film transistor array panel for a liquid crystal display
US6849873B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2002 |
| Grant date | Feb 1, 2005 |
| Priority date | — |
| Expiry date | Mar 22, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/949
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
In liquid crystal display device having a multi-layer conductive layer, such conductive layer is formed using a photoresist pattern having different thicknesses depending on the position. Upper layer of the gate pad is removed using an etch mask of the photoresist pattern of different thickness. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially formed. A conductive material is deposited and patterned to form a data wire. Finally passivation layer is formed and an indium tin oxide layer is deposited and patterned to form a pixel electrode, a redundant gate pad, and a redundant data pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.