Low leakage single-step latch circuit
US6850103B2 · kind B2 · utility
14Cited by
6References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2002 |
| Grant date | Feb 1, 2005 |
| Priority date | — |
| Expiry date | Apr 26, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/012
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This invention describes circuit techniques providing a means for achieving reliable data retention and low leakage current in single step latches with switch transistors. The techniques require changes only in the circuit configuration. Neither higher cost technology such as multiple-threshold LVT/HVT transistors nor special control circuits are needed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.