Digital to analog convertor
US6850177B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2002 |
| Grant date | Feb 1, 2005 |
| Priority date | — |
| Expiry date | May 13, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and circuit are provided for converting a digital signal to an analog signal in the form of a pulse width modulated (PWM) pulse (20). The PWM pulse is generated during an output cycle of a pulse generator to form a pulsetrain output of pulses at a fixed frequency whose widths are determined by dynamically changing digital input data. The method includes the steps of dividing the digital data signal into most significant bit (MSB) and least significant bit (LSB) portions. A PWM pulse is initiated at the beginning of an output cycle and continues while the MSB portion counts down in a counter (24). At the same time, the LSB portion of the digital data signal is converted to a precise phase delay signal which is a subcycle of an oscillator controlling the counter. This phase delay signal is generated after the termination of the MSB count, and halts the high period of the PWM pulse during the output cycle. When the output cycle ends, the process is repeated with the next digital signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.