Array substrate for liquid crystal display device
US6850289B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 9, 2003 |
| Grant date | Feb 1, 2005 |
| Priority date | — |
| Expiry date | Jul 25, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0223
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention is related to an array substrate for use in a liquid crystal display. The array substrate includes a transparent substrate; a plurality of gate lines arranged over the transparent substrate in a transverse direction; a plurality of data lines arranged over the transparent substrate in a longitudinal direction substantially perpendicular to the plurality of gate lines, intersections of the plurality of data lines and the plurality of gate lines defining a plurality of pixel regions; a gate driver contacting ends of the plurality of gate lines and sequentially scanning a gate pulse to the plurality of gate lines; a data driver contacting ends of the plurality of data lines and applying a data pulse to the plurality of data lines; a plurality of pixel electrodes disposed in the plurality of pixel regions; a plurality of first thin-film transistors disposed in the plurality of pixel regions, each first thin-film transistor including a gate electrode connected to a gate line, a source electrode connected to a data line, and a drain electrode connected to the pixel region; a feed line outputting an OFF voltage to the plurality of first thin-film transistors; and a p…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.