Frame synchronization and detection technique for a digital receiver
US6850582B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2003 |
| Grant date | Feb 1, 2005 |
| Priority date | — |
| Expiry date | Mar 17, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W84/14
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system and method of frame synchronization and detection for use in a digital receiver within a communication system. The digital radio communication system includes a receiver for receiving a signal stream that includes data frames. Each frame includes an arbitrary data sequence and a unique word. A predetermined number of contiguous bits from the unique word are appended to the beginning of each data frame to identify the start of the data frame. The communication system comprises a sampling circuit for sampling symbol levels, a filter to implement the cross correlation of the received signal with the stored unique word, a threshold detector circuit to detect when frame synchronization is achieved as well as additional circuitry to refine the estimate from the threshold detection circuit. The design utilizes coherent demodulation. However, the design is equally applicable to non-coherent demodulation. In one embodiment, the sampling rate is assumed to be two samples per symbol. However, the functionality of the proposed design is not limited to two samples per symbol.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.