Cache management instructions
US6851010B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2001 |
| Grant date | Feb 1, 2005 |
| Priority date | — |
| Expiry date | Sep 8, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention is directed to techniques for managing a cache within a processor using one or more machine instructions. The machine instructions may perform one or more operations on the cache. For example, victimize instructions, allocate instructions, and pre-fetch instructions can be executed in the processor as part of cache management. Moreover, these various cache management instructions may be defined by one or more operands that specify memory addresses within main memory, rather than addresses or identifiers that define locations within the cache. For this reason, a programmer may invoke these cache management instructions to direct the management of the cache without knowing the specific location of data within the cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.