Dual damascene semiconductor devices
US6852619B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 31, 2002 |
| Grant date | Feb 8, 2005 |
| Priority date | — |
| Expiry date | May 31, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/12044
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a wiring slot and two wiring layers connected by a via hole. The semiconductor device is formed using a photodegradable polymer film that degrades under UV radiation. An incidence angle θ of radiation rays in the irradiating step with respect to a perpendicular direction of a surface of the substrate, fulfills the relationship tan θ≧H+H′/2(D+D′) wherein D is a depth of the wiring slot, D′ is a thickness of the photoresist film, H is a diameter of the via hole in a opening of the wiring slot, and H′ is the width of the wiring slot.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.