Semiconductor device and communication terminal using thereof
US6853063B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2003 |
| Grant date | Feb 8, 2005 |
| Priority date | — |
| Expiry date | May 22, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Wire bonding or printed wiring board leads or, alternatively, lead frames or equivalents thereof are used to electrically connect external electrodes of high withstand voltage capacitors formed on a plurality of semiconductor chips. A driver circuit for signal transmission or receiver circuit for signal receipt formed on the semiconductor chips are electrically connected with substrate-side electrodes of said high withstand voltage capacitors, causing the plurality of semiconductor chips to be received within either a single package or a single module. Using this arrangement, a semiconductor device is capable of achieving both dielectricity and size reduction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.