Digital sum variation computation method and system
US6853684B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2003 |
| Grant date | Feb 8, 2005 |
| Priority date | — |
| Expiry date | Mar 30, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2020/1469
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A digital sum variation (DSV) computation method and system is proposed, which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols. This DSV computation method and system is characterized in the use of a Zero Digital Sum Variation (ZDSV) principle to determine the DSV. This DSV computation method and system can find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols in a more cost-effective manner with the need for a reduced amount of memory and utilizes a lookup table requiring a reduced amount of memory space for storage so that memory space can be reduced as compared to the prior art. This DSV computation method and system is therefore more advantageous to use than the prior art.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.