Method and apparatus for clock recovery and data qualification
US6853696B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 1999 |
| Grant date | Feb 8, 2005 |
| Priority date | — |
| Expiry date | Dec 20, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system for recovering a clock signal from a data signal is described. The system uses an oscillator adapted to generate an oscillator output signal, a first detecting circuit for obtaining a coarse frequency-lock condition between the data signal and a recovered clock signal, a second detecting circuit for obtaining a phase-locked condition between the data signal and the recovered clock signal, a lock-detecting circuit responsive to the first detecting circuit for detecting an out-of-lock condition between the data signal and the recovered clock signal, and a control circuit responsive to the lock-detecting circuits and adapted to control the oscillator to generate an oscillator output signal on the basis of the first detecting circuit during an out-of-lock condition, and otherwise to generate the oscillator output signal on the basis of the second detecting circuit. The advantages include a much wider pull-in range for frequency acquisition, and an accurate and robust measure of a quality of received data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.