Modification of circuit features that are interior to a packaged integrated circuit
US6854179B2 · kind B2 · utility
1Cited by
9References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2002 |
| Grant date | Feb 15, 2005 |
| Priority date | — |
| Expiry date | Nov 28, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49798
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A circuit feature that is interior to a packaged integrated circuit is modified by first identifying a trimming point on the interior circuit feature using an x-ray inspection system. Coordinates of the trimming point are then related to the coordinates of a visible reference marker. The relationship between the visible reference marker and the trimming point is then used to position a cutting tool over the trimming point. Finally, the cutting tool is used to make one or more cuts into the packaged integrated circuit, until the interior circuit feature has been acceptably modified at the trimming point.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.