LDO regulator with wide output load range and fast internal loop

US6856124B2 · kind B2 · utility

Assignee

• DIALOG SEMICONDUCTOR INC. · DE

Inventors

• David Dearn · Malmesbury, GB
• John Malcolm · Schomberg, CA
• Axel Pannwitz · Radebeul, DE

Key dates

• Filing date: Jul 9, 2002
• Grant date: Feb 15, 2005
• Expiry date: Jan 26, 2023

Classification

• Technology area (CPC G): Physics
• CPC primary: G05F1/575
• WIPO field: Control
• WIPO sector: Instruments

Abstract

A method and a circuit to achieve a low drop-out voltage regulator with a wide output load range has been achieved. A fast loop is introduced in the circuit. The circuit is internally compensated and uses a capacitor to ensure that the internal pole is more dominant than the output pole as in standard Miller compensation. The quiescent current is set being proportional to the output load current. No explicit low power drive stage is required. The whole output range is covered by one output drive stage. By that means the total consumption of quiescent or wasted current is reduced. An excellent PSRR is achieved due to load dependent bias current.