Phase/frequency detector and phase lock loop circuit
US6856202B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 12, 2003 |
| Grant date | Feb 15, 2005 |
| Priority date | — |
| Expiry date | Aug 19, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S331/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention relates to cycle slip detectors for phase and frequency detectors (PFD) and to lock detectors for phase lock loop (PLL) circuits. The present invention provides a cycle slip detector circuit for use with a phase and frequency detector circuit having first and second signal inputs, and arranged to provide first and second PLL control signal outputs responsive to clock edges in the first and second input signals respectively; the cycle slip detector circuit comprising: means for determining a cycle slip between said input signals by determining when a delayed output signal coincides with a respective input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.