Device and method for generating synchronous numeric signals with phase-delay minimization in control systems with open-loop compensation
US6856483B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2002 |
| Grant date | Feb 15, 2005 |
| Priority date | — |
| Expiry date | Apr 14, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B5/5552
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A device for generating synchronous numeric signals, including a first signal generator which supplies a numeric reference signal having a first frequency and a first period; and a second signal generator which generates an internal numeric signal having a second frequency and a second period, and a synchronized numeric signal. In addition, the second signal generator includes a predictor which generates, with a third period and a third frequency higher than the first frequency and the second frequency, estimated samples correlated to a current sample and to a predetermined number of former samples of the internal numeric signal. The predictor, in turn, includes a selection circuit controlled by the first signal generator for selecting one among the estimated samples in each reference period, the synchronized numeric signal being formed by the selected estimated samples.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.