Hacker-proof one time programmable memory
US6856531B2 · kind B2 · utility
5Cited by
1References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2004 |
| Grant date | Feb 15, 2005 |
| Priority date | — |
| Expiry date | Feb 7, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A one time programmable memory circuit includes a one time programmable memory array. A write circuit outputs data to the one time programmable memory array. A power up write controller outputs the data and a write enable signal to the write circuit. A read circuit outputs data from the one time programmable memory array upon a read enable signal received from a read controller. An address decoder communicates with the power up write controller and the read controller, for providing an address to the one time programmable memory array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.