Programmable logic device circuit and method of fabricating same
US6856542B2 · kind B2 · utility
21Cited by
6References
42Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 4, 2002 |
| Grant date | Feb 15, 2005 |
| Priority date | — |
| Expiry date | Jun 4, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/903
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic device (PLD) and method for fabricating the PLD are disclosed. The PLD includes an array of PLD cells. Each PLD cell may include a programmable transistor and a select transistor. The PLD array is divided into at least one first area and at least one second area adjacent the at least one first area. The at least one first area includes the programmable transistors and the at least one second area includes the select transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.