Apparatus for writing data bits to a memory array
US6856570B2 · kind B2 · utility
3Cited by
3References
29Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 30, 2003 |
| Grant date | Feb 15, 2005 |
| Priority date | — |
| Expiry date | Oct 30, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of writing data bits to a memory array. In one method embodiment, a first input is received. This causes an application of high power, via a sense line, to an addressed bit in the memory array and causes a write operation to be applied to the addressed bit. A second input is received. This causes an application of low power, via said sense line, to the addressed bit and causes a read operation on the addressed bit. The sense line is used to read and write the addressed bit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.