Patent · US Expired

Design methodology for merging programmable logic into a custom IC

US6857110B1 · kind B1 · utility

94Cited by
18References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 29, 2002
Grant dateFeb 15, 2005
Priority date
Expiry dateJan 29, 2022

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/30
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A programmable logic core (PLC) can be integrated into custom ICs such as ASICs and SOCs using a unique design methodology. For example, the methodology can incorporate the PLC into the entire ASIC design process from chip level RTL to final tape-out and resolve issues ranging from RTL guidelines through to sub-micron signal integrity. The post-manufacture programming flow is considered up-front during the ASIC flow and tools ensure successful programming in the field environment for the lifetime of the product. An example PLC architecture for integration into a custom IC includes a Multi Scale Array (MSA) that consists of an array of configurable ALUs and is implemented as a hard macro, an Application Circuit Interface (ACI) that provides signal interface between the MSA and application circuitry and is included in the same hard macro, and a PLC Adapter that initiates and loads the PLC configuration data and interfaces that is implemented as a soft-macro.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.