CMOS voltage controlled oscillator circuit for operation with low supply voltage and method for same
US6859112B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 19, 2003 |
| Grant date | Feb 22, 2005 |
| Priority date | — |
| Expiry date | May 19, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03B5/1253
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage controlled oscillator circuit and method comprising: a harmonic oscillator having a cross-coupled NFET devices (T1, T2) and an LC tank circuit (L1, L2, C) performing oscillation; a series voltage regulator (210) regulating voltage applied to the harmonic oscillator via a PFET device (T3) and differential amplifier (R); and a tuning circuit (220) having voltage controlled capacitance ‘Zero-Vt’ NFET devices (T4, T5) controlling oscillation of the harmonic oscillator. A differential output buffer (B) provides output buffering to a subsequent stage. This provides advantages that: operation at low supply voltages is facilitated and the sensitive oscillator cell is decoupled from the main supply noise offering improved phase noise performance; the output swing of the oscillator has a well controlled common-mode value which can be selected to most efficiently drive a following stage; and using ‘Zero-Vt’ NFETs facilitates the use of a lower supply voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.