RFID tag with a quadrupler or N-tupler circuit for efficient RF to DC conversion
US6859190B2 · kind B2 · utility
23Cited by
4References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 4, 2003 |
| Grant date | Feb 22, 2005 |
| Priority date | — |
| Expiry date | Sep 8, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06K19/0723
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multistage voltage multiplying circuit for single chip passive RF tags is provided, wherein the parasitic capacitance of the diodes of each stage of the voltage multiplying circuit is much less than the parasitic capacitance of the diodes of the preceding stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.