Synchronous breakpoint system and method
US6859892B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2001 |
| Grant date | Feb 22, 2005 |
| Priority date | — |
| Expiry date | Apr 4, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3632
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for synchronizing processors simulated in an architectural simulator for a multiprocessor environment. A synchronous breakpoint is set at a predetermined address location and a code portion targeted for execution on the target multiprocessor environment is launched on the simulator from a fixed location. Upon automatically stepping through a list of processors initialized in the simulator until each of the processors reaches the synchronous breakpoint, run control is returned to the user only after all processors have achieved a synchronous state. Debug operations may ensue thereafter by utilizing a debugger integrated with the architectural simulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.