Blooming control for a CMOS image sensor
US6861635B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 18, 2002 |
| Grant date | Mar 1, 2005 |
| Priority date | — |
| Expiry date | Dec 29, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/186
Abstract
A high voltage reset circuit with blooming control that increases the dynamic range of a CMOS image sensor and prevents blooming from occurring in output images. The circuit includes a high voltage supply circuit and a high voltage level shifter circuit. The high voltage supply circuit is configured to supply a voltage to the shifter circuit. The voltage has a voltage level higher than the absolute maximum voltage of the associated fabrication process. The shifter circuit is configured to output a high reset signal based on a reset signal generated to reset a pixel circuit of a pixel array. Instead of the reset signal, the high reset signal is coupled to a gate of the reset transistor in the pixel circuit. The high reset signal allows the reset transistor to maintain a gate to source potential less than the absolute maximum voltage even when the high reset signal is greater than the absolute maximum voltage. The high voltage level shifter circuit includes a high voltage inverter arranged to raise the low level of the high reset signal by a predetermined voltage and to control the rising and falling edges of the RESETH signal. This prevents a photodiode in the pixel circuit from bec…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.