Semiconductor device with stacked-semiconductor chips and support plate
US6861760B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2002 |
| Grant date | Mar 1, 2005 |
| Priority date | — |
| Expiry date | Apr 11, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprises a plurality of semiconductor chips stacked in the direction of thickness. Each of the semiconductor chips includes an upper surface formed with electrodes. The semiconductor device further comprises a plurality of terminal portions disposed beside these semiconductor chips, and a plural pieces of wire for electrical connection from the electrodes to respective terminal portions. Each of the terminal portions is at an elevation lower than the highest electrodes, and higher than the lowest electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.