System and method for setting and executing breakpoints
US6862694B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2001 |
| Grant date | Mar 1, 2005 |
| Priority date | — |
| Expiry date | Jul 19, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/362
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for setting and executing breakpoints utilized for debugging program code. A user interface (UI) stores breakpoint addresses in a breakpoint table within a central processing unit (CPU). Multiple breakpoint addresses may be stored in the table as a range of addresses in a single entry. A flag indicates whether each stored address or address range is a physical or virtual address. When executing the program code on the CPU, an instruction core requests from an instruction cache, an instruction associated with a particular address. The cache first determines from the breakpoint table within the CPU whether there is a breakpoint associated with the particular address. If so, the cache returns control to the UI. Otherwise, the cache goes out to a coherency controller to fetch the instruction from memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.