Photomask and pattern forming method used in a thermal flow process and semiconductor integrated circuit fabricated using the thermal flow process
US6864021B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2003 |
| Grant date | Mar 8, 2005 |
| Priority date | — |
| Expiry date | May 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31144
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The invention relates to a photomask for use in a thermal flow process in which: a photomask is prepared in which a plurality of exposure openings are formed; a resist is applied to the surface of a layer of a semiconductor integrated circuit that is to undergo processing; this resist is patterned by an exposure process through the photomask to form a plurality of openings in the resist that correspond to each of the exposure openings; and the patterned resist is then heated to cause each of the openings to shrink; wherein at least a portion of exposure openings among the plurality of exposure openings are formed in shapes that compensate for anisotropic deformation that occurs in the openings when the patterned resist is heated to cause each of the openings to shrink. Since the openings that are formed in the resist are provided in advance with shapes that compensate for the deformation that occurs when the openings shrink, these openings attain the proper shape after undergoing shrinking and deformation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.