High-speed interconnection adapter having automated crossed differential pair correction
US6865231B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 20, 2000 |
| Grant date | Mar 8, 2005 |
| Priority date | — |
| Expiry date | Dec 21, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/085
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An adapter configured to automatically detect and compensate for differential signal inversion is herein disclosed. In one embodiment, the adapter is part of a computer network having differential conductor pairs conveying differential signals between network devices. The network devices include adapters coupled to transmit and receive signals via the differential conductor pairs. The adapter preferably includes a lane receiver, a decoder, and a synchronization circuit. The lane receiver is configured to receive a single differential signal and to convert the differential signal into a sequence of code symbols. The decoder decodes the code symbols to produce a sequence of received symbols. The synchronization circuit examines the sequence of received symbols to determine if it is incorrect due to inversion of the differential signal, and if so, it causes the lane receiver to correct for the differential signal inversion. It is expected that the received symbol sequence will include a training symbol sequence which will have a start symbol whose decoded value is unaffected by differential signal inversion, and a training symbol whose decoded value is indicative of the presence or ab…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.