Controlling VLIW instruction operations supply to functional units using switches based on condition head field
US6865662B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 8, 2002 |
| Grant date | Mar 8, 2005 |
| Priority date | — |
| Expiry date | Sep 11, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A VLIW processor for executing a sequence of very long instruction words having a plurality of operations to be executed in parallel. The VLIW processor has a plurality of functional units for parallel execution of the operations specified by the VLIW, an instruction register for holding the VLIW, and a condition flag for indicating the results of a comparison operation. The VLIW includes a conditional head and a plurality of slots, each slot including an operational code and any related operands. The conditional head has a plurality of conditional indicators, each conditional indicator uniquely corresponding to one operation and specifying a condition in which the operation is to be executed if the indicated condition exists. A control circuit is connected to the instruction register and the functional units to deliver the operation from the instruction register to the corresponding functional unit for execution when the condition exists.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.