Double-sided extended drain field effect transistor, and integrated overvoltage and reverse voltage protection circuit that uses the same
US6867640B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2003 |
| Grant date | Mar 15, 2005 |
| Priority date | — |
| Expiry date | Jul 16, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/811
Abstract
An integrated overvoltage and reverse voltage protection circuit that includes two p-channel double-sided extended drain transistors coupled to a high voltage source, each having their n-well coupled through a resistor to the high voltage source. For voltage regulation, a voltage divider is coupled in series with a first of these transistors, while the drain of the second transistor is coupled to the gate of the first transistor. For voltage blocking, the voltage divider may span the entire supply voltage. An n-channel transistor couples the second p-channel transistor to a low voltage source. A middle node in the voltage divider is coupled to one input of a comparator, with a reference voltage coupled to the second input. The comparator output drives the gate terminal of the n-channel transistor. A load to be protected may be disposed in parallel with the voltage divider.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.