Method and system for overloaded array processing
US6868133B2 · kind B2 · utility
24Cited by
4References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 15, 2001 |
| Grant date | Mar 15, 2005 |
| Priority date | — |
| Expiry date | Aug 30, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B7/086
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
According to the present invention, a method and system for array processing are disclosed. Signals transmitting a symbol set are received. A dominant signal set for each signal, which includes dominant signals that interfere with the signal, is determined. A trellis, which includes paths that represent possible symbol sets, is constructed from the dominant signal sets. An optimal path from the trellis is selected, and the symbol set represented by the optimal path is determined.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.