Dynamically reconfigurable interconnection
US6871294B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2001 |
| Grant date | Mar 22, 2005 |
| Priority date | — |
| Expiry date | May 28, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for dynamically reconfiguring a computing system are disclosed. The method comprises detecting a predetermined condition triggering a reconfiguration of the computing system; and dynamically reconfiguring a signal path affected by the condition from a first mode to a second mode responsive to detecting the condition. The apparatus is a computing system, comprising: a plurality of I/O switches, a crossbar switch, a plurality of signal paths; and a system controller. Each signal path is defined by an I/O switch and the crossbar switch. The system controller is capable of detecting a predetermined condition triggering a reconfiguration and dynamically reconfiguring at least one of the signal paths affected by the condition from a first mode to a second mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.