Patent · US Expired

Central processing apparatus and a compile method

US6871343B1 · kind B1 · utility

12Cited by
12References
24Claims
0Family size

Assignee

Inventor

Key dates

Filing dateSep 22, 2000
Grant dateMar 22, 2005
Priority date
Expiry dateOct 31, 2022

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/3858
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems and methods are disclosed for generating a program executed by a central processing apparatus for assigning instructions of the program. The systems and methods may include dividing the program into a plurality of instruction sequences, each instruction sequence comprising a plurality of instructions not executable in parallel because of data dependency. In addition, the systems and methods may include moving an instruction sequence speculatively executable forward an instruction sequence not speculatively executable in the program and aligning the plurality of instruction sequences in correspondence with each of the plurality of buffers. Moreover, the systems and methods may include assigning a task number representing the instruction sequence and a corresponding buffer to each instruction and replacing a condition instruction by a commit instruction, the commit instruction including a condition, task numbers to be accepted if the condition is not satisfied and task numbers to be rejected if the condition is satisfied.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.