Method for forming interconnections including multi-layer metal film stack for improving corrosion and heat resistances
US6872603B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 13, 2003 |
| Grant date | Mar 29, 2005 |
| Priority date | — |
| Expiry date | Nov 13, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6746
Abstract
A method of fabricating a semiconductor device including an interconnection is provided. The method is composed of covering a substrate with a metal film stack including a lower refractory metal film over the substrate, a lower protective layer of a first compound including metal disposed on an upper surface of the lower refractory metal film, a core metal film of the metal on an upper surface of the lower protective layer, an upper protective layer of a second compound including the metal disposed on an upper surface of the core metal film, and an upper refractory metal film disposed on an upper surface of the upper protective layer, patterning the metal film stack; and forming a side protective layer of a third compound including the metal on a side of the patterned core metal film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.