Semiconductor device with smoothed pad portion
US6873053B2 · kind B2 · utility
4Cited by
3References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2002 |
| Grant date | Mar 29, 2005 |
| Priority date | — |
| Expiry date | Feb 14, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor forming transistors on a semiconductor substrate includes a low concentration source/drain region formed in the semiconductor substrate, a high concentration source/drain region formed in the source/drain region, a gate electrode formed on the substrate through gate oxide film, a P type body region formed under the gate electrode and placed between the source/drain regions and, plug contact portions contacting the source/drain region and arranged in plural, and a source/drain electrode connecting to the source/drain region with contact through the contact portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.