Multi-mode bias circuit for power amplifiers
US6873211B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2003 |
| Grant date | Mar 29, 2005 |
| Priority date | — |
| Expiry date | Sep 10, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/7206
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
According to an exemplary embodiment, a circuit arrangement includes a multi-mode bias circuit having a control voltage input, a mode control input for selecting between a linear mode and a saturation mode, and a bias output. The circuit arrangement further includes an amplifier having a bias input connected to the bias output of the multi-mode bias circuit, the amplifier having an RF input and an RF output. The multi-mode bias circuit causes the amplifier RF output power to be proportional to the RF input power when the mode control input selects the linear mode. Conversely, the multi-mode bias circuit causes the amplifier RF output power to be determined by the voltage at the control voltage input when the mode control input selects the saturation mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.