Flash drive/reader with serial-port controller and flash-memory controller mastering a second RAM-buffer bus parallel to a CPU bus
US6874044B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2003 |
| Grant date | Mar 29, 2005 |
| Priority date | — |
| Expiry date | Oct 21, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/102
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash-drive or flash-card reader connects to a personal computer (PC) through a serial link such as a Universal-Serial-Bus (USB), IEEE 1394, SATA, or IDE. A local CPU acts as the bus master of a CPU bus that connects to slave ports on a flash-memory controller, a serial engine, and a RAM buffer. A second bus in parallel to the CPU bus connects a second slave port on the RAM buffer to a master port on the flash-memory controller and to a master port on the serial engine. The flash-memory controller or the serial engine can use their master ports to transfer data to and from the RAM buffer using the second bus, allowing the CPU to retain control of the CPU bus. The second bus is a flash-serial buffer bus that improves data transfer rates. The flash-memory controller can prefetch into the RAM buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.