Semiconductor device
US6876067B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2003 |
| Grant date | Apr 5, 2005 |
| Priority date | — |
| Expiry date | Mar 26, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device improved in reliability is disclosed. The semiconductor device comprises a semiconductor chip, a sealing member which seals the semiconductor chip with resin, a tub having a chip bonding surface for bonding with the chip and a back surface located on the side opposite to the chip bonding surface and exposed to a surface of the sealing member, plural inner leads electrically connected respectively to bonding pads on the semiconductor chip through wires such as gold wires, and plural outer leads integrally connected respectively to the inner leads and projecting to the exterior of the sealing member, wherein surfaces of the tub and the plural inner and outer leads are all coated with palladium plating. In the case where a heat radiation member is attached to the back surface of the tub, the palladium plating does not melt during solder reflow for example, so that the heat radiation member can be prevented from falling off and hence it is possible to improve the reliability of a QFP as the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.