Signal layer interconnect using tapered traces
US6876085B1 · kind B1 · utility
6Cited by
10References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 7, 2002 |
| Grant date | Apr 5, 2005 |
| Priority date | — |
| Expiry date | May 7, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/1034
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An interconnection device has a substrate that includes a conductive trace having an exposed portion at an edge of the substrate. The exposed portion is tapered toward the edge of the substrate. The exposed portion is provided for direct physical contact with a second conductive trace exposed at an edge of a second substrate. A high frequency direct electrical interconnection is thereby provided that reduces the disadvantageous effects of lateral, longitudinal, and co-planar misalignment between the conductive traces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.