Shift register and electronic apparatus
US6876353B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2002 |
| Grant date | Apr 5, 2005 |
| Priority date | — |
| Expiry date | Nov 20, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/184
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shift register includes stages, outputting an output signal from each stage. The stage includes a first transistor which outputs an output signal inputted into one terminal from the previous stage via the other terminal, when an output signal is inputted into its control terminal. A second transistor has a control terminal connected to the other terminal of the first transistor, accumulates charges in a capacity of a wiring between the control terminal and the other terminal of the first transistor by a clock signal inputted into one terminal and outputs the clock signal from one terminal. A circuit displaces a potential of the wiring to a predetermined level when the output signal is inputted from the subsequent stage, and holds the potential of the wiring at a predetermined level until the output signal is inputted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.