Edge enhancement method and apparatus in digital image scalar-up circuit
US6876778B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2002 |
| Grant date | Apr 5, 2005 |
| Priority date | — |
| Expiry date | Oct 15, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/20192
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An edge enhancement method and an edge enhancement apparatus in digital image scalar-up circuit are provided. A band-pass filtering process is performed to an input image pixel in multiple directions to generate multiple sum-of-border values which are summed up to generate an overall sum-of-border value. A first gain and a second gain are provided according to the overall sum-of-border value. A high-pass filtering process and a low-pass filtering process are performed to the input image pixel to obtain border and plain components which are multiplied by the first gain and second gain, respectively. The gained border component and plain component are summed and added to the original pixel to obtain a new pixel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.