Signal-conditioning and analog-to-digital conversion circuit architecture
US6879274B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2004 |
| Grant date | Apr 12, 2005 |
| Priority date | — |
| Expiry date | Feb 24, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/124
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital metering circuit includes a first programmable gain amplifier to amplify a first voltage signal from a first channel before being received by a first analog-to-digital converter that converts the amplified first voltage signal to a first digital signal. A second programmable gain amplifier amplifies a second voltage signal from a second channel and feds the amplified signal to a second analog-to-digital converter that converts the amplified second voltage signal to a second digital signal. A first lowpass filter circuit receives the first and second digital signals, to generate therefrom, a multi-bit analog-to-digital value. A direct digital synthesizer generates a digital signal representing a predetermined waveform that is fed to a digital-to-analog converter. The second voltage signal and the digital signal representing the predetermined waveform are multiplied together to generate a digital value. Phase shifting circuitry provides a signal representing a 90-degree phase shift of the digital value and a signal representing a 0-degree phase shift of the digital value. RMS circuitry converts the 0-degree phase digital signal into an In-Phase signal and the 90-…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.