Method and apparatus for optimizing distributed multiplexed bus interconnects
US6880133B2 · kind B2 · utility
20Cited by
12References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 15, 2002 |
| Grant date | Apr 12, 2005 |
| Priority date | — |
| Expiry date | May 15, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for optimizing distributed multiplexed bus interconnects are described. The multiplexed bus interconnect contains one or more multiplexers to route signals through the bus interconnect. An amount of signaling wiring present within a distributed multiplexed bus interconnect is optimized by eliminating individual signaling wires based upon whether an Intellectual Property core connected to the multiplexed bus interconnect transmits or receives signals from the distributed multiplexed bus interconnect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.