Method and apparatus for interfacing mixed voltage signals
US6882209B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 9, 1997 |
| Grant date | Apr 19, 2005 |
| Priority date | — |
| Expiry date | Jul 23, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01707
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A buffer circuit is used to convert signals of a first preselected voltage level to a second preselected voltage level. A pass gate transistor has a gate, source, and drain and is adapted to receive the signals of the first preselected voltage level, and deliver the signals of the second preselected voltage level. A capacitor is coupled across the source and drain of the pass gate transistor. A resistive element is coupled between the gate of the pass gate transistor and a voltage supply. The resistive element cooperates with a parasitic capacitance located between the gate and source of the pass gate transistor to form a pump that reacts to a low-to-high transition in the input signal to temporarily increase the voltage level applied to the gate of the pass gate transistor. This temporarily increased voltage level causes the voltage level output from the pass gate transition to track the transition in the input signal more closely.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.